#pragma once

#include "limesuiteng/config.h"

#include <vector>

namespace lime {
namespace LMS7002MCSR_Data {
struct CSRegister;
} // namespace LMS7002MCSR_Data

enum class LMS7002MCSR : uint16_t {
    LRST_TX_B,
    MRST_TX_B,
    LRST_TX_A,
    MRST_TX_A,
    LRST_RX_B,
    MRST_RX_B,
    LRST_RX_A,
    MRST_RX_A,
    SRST_RXFIFO,
    SRST_TXFIFO,
    RXEN_B,
    RXEN_A,
    TXEN_B,
    TXEN_A,
    MAC,
    TX_CLK_PE,
    RX_CLK_PE,
    SDA_PE,
    SDA_DS,
    SCL_PE,
    SCL_DS,
    SDIO_DS,
    SDIO_PE,
    SDO_PE,
    SCLK_PE,
    SEN_PE,
    SPIMODE,
    DIQ2_DS,
    DIQ2_PE,
    IQ_SEL_EN_2_PE,
    TXNRX2_PE,
    FCLK2_PE,
    MCLK2_PE,
    DIQ1_DS,
    DIQ1_PE,
    IQ_SEL_EN_1_PE,
    TXNRX1_PE,
    FCLK1_PE,
    MCLK1_PE,
    DIQDIRCTR2,
    DIQDIR2,
    DIQDIRCTR1,
    DIQDIR1,
    ENABLEDIRCTR2,
    ENABLEDIR2,
    ENABLEDIRCTR1,
    ENABLEDIR1,
    MOD_EN,
    LML2_FIDM,
    LML2_TXNRXIQ,
    LML2_MODE,
    LML1_FIDM,
    LML1_TXNRXIQ,
    LML1_MODE,
    LML1_S3S,
    LML1_S2S,
    LML1_S1S,
    LML1_S0S,
    LML1_BQP,
    LML1_BIP,
    LML1_AQP,
    LML1_AIP,
    LML1_BB2RF_PST,
    LML1_BB2RF_PRE,
    LML1_RF2BB_PST,
    LML1_RF2BB_PRE,
    LML2_S3S,
    LML2_S2S,
    LML2_S1S,
    LML2_S0S,
    LML2_BQP,
    LML2_BIP,
    LML2_AQP,
    LML2_AIP,
    LML2_BB2RF_PST,
    LML2_BB2RF_PRE,
    LML2_RF2BB_PST,
    LML2_RF2BB_PRE,
    FCLK2_DLY,
    FCLK1_DLY,
    RX_MUX,
    TX_MUX,
    TXRDCLK_MUX,
    TXWRCLK_MUX,
    RXRDCLK_MUX,
    RXWRCLK_MUX,
    FCLK2_INV,
    FCLK1_INV,
    MCLK2DLY,
    MCLK1DLY,
    MCLK2SRC,
    MCLK1SRC,
    TXDIVEN,
    RXDIVEN,
    TXTSPCLKA_DIV,
    RXTSPCLKA_DIV,
    MIMO_SISO,
    VER,
    REV,
    MASK,
    EN_DIR_LDO,
    EN_DIR_CGEN,
    EN_DIR_XBUF,
    EN_DIR_AFE,
    ISEL_DAC_AFE,
    MODE_INTERLEAVE_AFE,
    MUX_AFE_1,
    MUX_AFE_2,
    PD_AFE,
    PD_RX_AFE1,
    PD_RX_AFE2,
    PD_TX_AFE1,
    PD_TX_AFE2,
    EN_G_AFE,
    MUX_BIAS_OUT,
    RP_CALIB_BIAS,
    PD_FRP_BIAS,
    PD_F_BIAS,
    PD_PTRP_BIAS,
    PD_PT_BIAS,
    PD_BIAS_MASTER,
    SLFB_XBUF_RX,
    SLFB_XBUF_TX,
    BYP_XBUF_RX,
    BYP_XBUF_TX,
    EN_OUT2_XBUF_TX,
    EN_TBUFIN_XBUF_RX,
    PD_XBUF_RX,
    PD_XBUF_TX,
    EN_G_XBUF,
    SPDUP_VCO_CGEN,
    RESET_N_CGEN,
    EN_ADCCLKH_CLKGN,
    EN_COARSE_CKLGEN,
    EN_INTONLY_SDM_CGEN,
    EN_SDM_CLK_CGEN,
    PD_CP_CGEN,
    PD_FDIV_FB_CGEN,
    PD_FDIV_O_CGEN,
    PD_SDM_CGEN,
    PD_VCO_CGEN,
    PD_VCO_COMP_CGEN,
    EN_G_CGEN,
    FRAC_SDM_CGEN_LSB,
    INT_SDM_CGEN,
    FRAC_SDM_CGEN_MSB,
    REV_SDMCLK_CGEN,
    SEL_SDMCLK_CGEN,
    SX_DITHER_EN_CGEN,
    CLKH_OV_CLKL_CGEN,
    DIV_OUTCH_CGEN,
    TST_CGEN,
    REV_CLKDAC_CGEN,
    CMPLO_CTRL_CGEN,
    REV_CLKADC_CGEN,
    REVPH_PFD_CGEN,
    IOFFSET_CP_CGEN,
    IPULSE_CP_CGEN,
    ICT_VCO_CGEN,
    CSW_VCO_CGEN,
    COARSE_START_CGEN,
    COARSE_STEPDONE_CGEN,
    COARSEPLL_COMPO_CGEN,
    VCO_CMPHO_CGEN,
    VCO_CMPLO_CGEN,
    CP2_CGEN,
    CP3_CGEN,
    CZ_CGEN,
    EN_LDO_DIG,
    EN_LDO_DIGGN,
    EN_LDO_DIGSXR,
    EN_LDO_DIGSXT,
    EN_LDO_DIVGN,
    EN_LDO_DIVSXR,
    EN_LDO_DIVSXT,
    EN_LDO_LNA12,
    EN_LDO_LNA14,
    EN_LDO_MXRFE,
    EN_LDO_RBB,
    EN_LDO_RXBUF,
    EN_LDO_TBB,
    EN_LDO_TIA12,
    EN_LDO_TIA14,
    EN_G_LDO,
    EN_LOADIMP_LDO_TLOB,
    EN_LOADIMP_LDO_TPAD,
    EN_LOADIMP_LDO_TXBUF,
    EN_LOADIMP_LDO_VCOGN,
    EN_LOADIMP_LDO_VCOSXR,
    EN_LOADIMP_LDO_VCOSXT,
    EN_LDO_AFE,
    EN_LDO_CPGN,
    EN_LDO_CPSXR,
    EN_LDO_TLOB,
    EN_LDO_TPAD,
    EN_LDO_TXBUF,
    EN_LDO_VCOGN,
    EN_LDO_VCOSXR,
    EN_LDO_VCOSXT,
    EN_LDO_CPSXT,
    EN_LOADIMP_LDO_CPSXT,
    EN_LOADIMP_LDO_DIG,
    EN_LOADIMP_LDO_DIGGN,
    EN_LOADIMP_LDO_DIGSXR,
    EN_LOADIMP_LDO_DIGSXT,
    EN_LOADIMP_LDO_DIVGN,
    EN_LOADIMP_LDO_DIVSXR,
    EN_LOADIMP_LDO_DIVSXT,
    EN_LOADIMP_LDO_LNA12,
    EN_LOADIMP_LDO_LNA14,
    EN_LOADIMP_LDO_MXRFE,
    EN_LOADIMP_LDO_RBB,
    EN_LOADIMP_LDO_RXBUF,
    EN_LOADIMP_LDO_TBB,
    EN_LOADIMP_LDO_TIA12,
    EN_LOADIMP_LDO_TIA14,
    BYP_LDO_TBB,
    BYP_LDO_TIA12,
    BYP_LDO_TIA14,
    BYP_LDO_TLOB,
    BYP_LDO_TPAD,
    BYP_LDO_TXBUF,
    BYP_LDO_VCOGN,
    BYP_LDO_VCOSXR,
    BYP_LDO_VCOSXT,
    EN_LOADIMP_LDO_AFE,
    EN_LOADIMP_LDO_CPGN,
    EN_LOADIMP_LDO_CPSXR,
    BYP_LDO_AFE,
    BYP_LDO_CPGN,
    BYP_LDO_CPSXR,
    BYP_LDO_CPSXT,
    BYP_LDO_DIG,
    BYP_LDO_DIGGN,
    BYP_LDO_DIGSXR,
    BYP_LDO_DIGSXT,
    BYP_LDO_DIVGN,
    BYP_LDO_DIVSXR,
    BYP_LDO_DIVSXT,
    BYP_LDO_LNA12,
    BYP_LDO_LNA14,
    BYP_LDO_MXRFE,
    BYP_LDO_RBB,
    BYP_LDO_RXBUF,
    SPDUP_LDO_DIVSXR,
    SPDUP_LDO_DIVSXT,
    SPDUP_LDO_LNA12,
    SPDUP_LDO_LNA14,
    SPDUP_LDO_MXRFE,
    SPDUP_LDO_RBB,
    SPDUP_LDO_RXBUF,
    SPDUP_LDO_TBB,
    SPDUP_LDO_TIA12,
    SPDUP_LDO_TIA14,
    SPDUP_LDO_TLOB,
    SPDUP_LDO_TPAD,
    SPDUP_LDO_TXBUF,
    SPDUP_LDO_VCOGN,
    SPDUP_LDO_VCOSXR,
    SPDUP_LDO_VCOSXT,
    SPDUP_LDO_AFE,
    SPDUP_LDO_CPGN,
    SPDUP_LDO_CPSXR,
    SPDUP_LDO_CPSXT,
    SPDUP_LDO_DIG,
    SPDUP_LDO_DIGGN,
    SPDUP_LDO_DIGSXR,
    SPDUP_LDO_DIGSXT,
    SPDUP_LDO_DIVGN,
    RDIV_VCOSXR,
    RDIV_VCOSXT,
    RDIV_TXBUF,
    RDIV_VCOGN,
    RDIV_TLOB,
    RDIV_TPAD,
    RDIV_TIA12,
    RDIV_TIA14,
    RDIV_RXBUF,
    RDIV_TBB,
    RDIV_MXRFE,
    RDIV_RBB,
    RDIV_LNA12,
    RDIV_LNA14,
    RDIV_DIVSXR,
    RDIV_DIVSXT,
    RDIV_DIGSXT,
    RDIV_DIVGN,
    RDIV_DIGGN,
    RDIV_DIGSXR,
    RDIV_CPSXT,
    RDIV_DIG,
    RDIV_CPGN,
    RDIV_CPSXR,
    RDIV_SPIBUF,
    RDIV_AFE,
    SPDUP_LDO_SPIBUF,
    SPDUP_LDO_DIGIp2,
    SPDUP_LDO_DIGIp1,
    BYP_LDO_SPIBUF,
    BYP_LDO_DIGIp2,
    BYP_LDO_DIGIp1,
    EN_LOADIMP_LDO_SPIBUF,
    EN_LOADIMP_LDO_DIGIp2,
    EN_LOADIMP_LDO_DIGIp1,
    PD_LDO_SPIBUF,
    PD_LDO_DIGIp2,
    PD_LDO_DIGIp1,
    EN_G_LDOP,
    RDIV_DIGIp2,
    RDIV_DIGIp1,
    BSIGT,
    BSTATE,
    EN_SDM_TSTO_SXT,
    EN_SDM_TSTO_SXR,
    EN_SDM_TSTO_CGEN,
    BENC,
    BENR,
    BENT,
    BSTART,
    BSIGR,
    BSIGC,
    CDS_MCLK2,
    CDS_MCLK1,
    CDSN_TXBTSP,
    CDSN_TXATSP,
    CDSN_RXBTSP,
    CDSN_RXATSP,
    CDSN_TXBLML,
    CDSN_TXALML,
    CDSN_RXBLML,
    CDSN_RXALML,
    CDSN_MCLK2,
    CDSN_MCLK1,
    CDS_TXBTSP,
    CDS_TXATSP,
    CDS_RXBTSP,
    CDS_RXATSP,
    CDS_TXBLML,
    CDS_TXALML,
    CDS_RXBLML,
    CDS_RXALML,
    EN_LOWBWLOMX_TMX_TRF,
    EN_NEXTTX_TRF,
    EN_AMPHF_PDET_TRF,
    LOADR_PDET_TRF,
    PD_PDET_TRF,
    PD_TLOBUF_TRF,
    PD_TXPAD_TRF,
    EN_G_TRF,
    F_TXPAD_TRF,
    L_LOOPB_TXPAD_TRF,
    LOSS_LIN_TXPAD_TRF,
    LOSS_MAIN_TXPAD_TRF,
    EN_LOOPB_TXPAD_TRF,
    GCAS_GNDREF_TXPAD_TRF,
    ICT_LIN_TXPAD_TRF,
    ICT_MAIN_TXPAD_TRF,
    VGCAS_TXPAD_TRF,
    SEL_BAND1_TRF,
    SEL_BAND2_TRF,
    LOBIASN_TXM_TRF,
    LOBIASP_TXX_TRF,
    CDC_I_TRF,
    CDC_Q_TRF,
    STATPULSE_TBB,
    LOOPB_TBB,
    PD_LPFH_TBB,
    PD_LPFIAMP_TBB,
    PD_LPFLAD_TBB,
    PD_LPFS5_TBB,
    EN_G_TBB,
    ICT_LPFS5_F_TBB,
    ICT_LPFS5_PT_TBB,
    ICT_LPF_H_PT_TBB,
    ICT_LPFH_F_TBB,
    ICT_LPFLAD_F_TBB,
    ICT_LPFLAD_PT_TBB,
    CG_IAMP_TBB,
    ICT_IAMP_FRP_TBB,
    ICT_IAMP_GG_FRP_TBB,
    RCAL_LPFH_TBB,
    RCAL_LPFLAD_TBB,
    TSTIN_TBB,
    BYPLADDER_TBB,
    CCAL_LPFLAD_TBB,
    RCAL_LPFS5_TBB,
    CDC_I_RFE,
    CDC_Q_RFE,
    PD_LNA_RFE,
    PD_RLOOPB_1_RFE,
    PD_RLOOPB_2_RFE,
    PD_MXLOBUF_RFE,
    PD_QGEN_RFE,
    PD_RSSI_RFE,
    PD_TIA_RFE,
    EN_G_RFE,
    SEL_PATH_RFE,
    EN_DCOFF_RXFE_RFE,
    EN_INSHSW_LB1_RFE,
    EN_INSHSW_LB2_RFE,
    EN_INSHSW_L_RFE,
    EN_INSHSW_W_RFE,
    EN_NEXTRX_RFE,
    DCOFFI_RFE,
    DCOFFQ_RFE,
    ICT_LOOPB_RFE,
    ICT_TIAMAIN_RFE,
    ICT_TIAOUT_RFE,
    ICT_LNACMO_RFE,
    ICT_LNA_RFE,
    ICT_LODC_RFE,
    CAP_RXMXO_RFE,
    CGSIN_LNA_RFE,
    CCOMP_TIA_RFE,
    CFB_TIA_RFE,
    G_LNA_RFE,
    G_RXLOOPB_RFE,
    G_TIA_RFE,
    RCOMP_TIA_RFE,
    RFB_TIA_RFE,
    EN_LB_LPFH_RBB,
    EN_LB_LPFL_RBB,
    PD_LPFH_RBB,
    PD_LPFL_RBB,
    PD_PGA_RBB,
    EN_G_RBB,
    R_CTL_LPF_RBB,
    RCC_CTL_LPFH_RBB,
    C_CTL_LPFH_RBB,
    RCC_CTL_LPFL_RBB,
    C_CTL_LPFL_RBB,
    INPUT_CTL_PGA_RBB,
    ICT_LPF_IN_RBB,
    ICT_LPF_OUT_RBB,
    OSW_PGA_RBB,
    ICT_PGA_OUT_RBB,
    ICT_PGA_IN_RBB,
    G_PGA_RBB,
    RCC_CTL_PGA_RBB,
    C_CTL_PGA_RBB,
    RESET_N,
    SPDUP_VCO,
    BYPLDO_VCO,
    EN_COARSEPLL,
    CURLIM_VCO,
    EN_DIV2_DIVPROG,
    EN_INTONLY_SDM,
    EN_SDM_CLK,
    PD_FBDIV,
    PD_LOCH_T2RBUF,
    PD_CP,
    PD_FDIV,
    PD_SDM,
    PD_VCO_COMP,
    PD_VCO,
    EN_G,
    FRAC_SDM_LSB,
    INT_SDM,
    FRAC_SDM_MSB,
    PW_DIV2_LOCH,
    PW_DIV4_LOCH,
    DIV_LOCH,
    TST_SX,
    SEL_SDMCLK,
    SX_DITHER_EN,
    REV_SDMCLK,
    VDIV_VCO,
    ICT_VCO,
    RSEL_LDO_VCO,
    CSW_VCO,
    SEL_VCO,
    COARSE_START,
    REVPH_PFD,
    IOFFSET_CP,
    IPULSE_CP,
    COARSE_STEPDONE,
    COARSEPLL_COMPO,
    VCO_CMPHO,
    VCO_CMPLO,
    CP2_PLL,
    CP3_PLL,
    CZ,
    EN_DIR_SXRSXT,
    EN_DIR_RBB,
    EN_DIR_RFE,
    EN_DIR_TBB,
    EN_DIR_TRF,
    TSGFC_TXTSP,
    TSGFCW_TXTSP,
    TSGDCLDQ_TXTSP,
    TSGDCLDI_TXTSP,
    TSGSWAPIQ_TXTSP,
    TSGMODE_TXTSP,
    INSEL_TXTSP,
    BSTART_TXTSP,
    EN_TXTSP,
    GCORRQ_TXTSP,
    GCORRI_TXTSP,
    HBI_OVR_TXTSP,
    IQCORR_TXTSP,
    DCCORRI_TXTSP,
    DCCORRQ_TXTSP,
    GFIR1_L_TXTSP,
    GFIR1_N_TXTSP,
    GFIR2_L_TXTSP,
    GFIR2_N_TXTSP,
    GFIR3_L_TXTSP,
    GFIR3_N_TXTSP,
    CMIX_GAIN_TXTSP,
    CMIX_SC_TXTSP,
    CMIX_BYP_TXTSP,
    ISINC_BYP_TXTSP,
    GFIR3_BYP_TXTSP,
    GFIR2_BYP_TXTSP,
    GFIR1_BYP_TXTSP,
    DC_BYP_TXTSP,
    GC_BYP_TXTSP,
    PH_BYP_TXTSP,
    BSIGI_TXTSP,
    BSTATE_TXTSP,
    BSIGQ_TXTSP,
    DC_REG_TXTSP,
    DTHBIT_TX,
    SEL_TX,
    MODE_TX,
    PHO_TX,
    CAPTURE,
    CAPSEL,
    CAPSEL_ADC,
    TSGFC_RXTSP,
    TSGFCW_RXTSP,
    TSGDCLDQ_RXTSP,
    TSGDCLDI_RXTSP,
    TSGSWAPIQ_RXTSP,
    TSGMODE_RXTSP,
    INSEL_RXTSP,
    BSTART_RXTSP,
    EN_RXTSP,
    GCORRQ_RXTSP,
    GCORRI_RXTSP,
    HBD_OVR_RXTSP,
    IQCORR_RXTSP,
    HBD_DLY,
    DCCORR_AVG_RXTSP,
    GFIR1_L_RXTSP,
    GFIR1_N_RXTSP,
    GFIR2_L_RXTSP,
    GFIR2_N_RXTSP,
    GFIR3_L_RXTSP,
    GFIR3_N_RXTSP,
    AGC_K_RXTSP,
    AGC_ADESIRED_RXTSP,
    RSSI_MODE,
    AGC_MODE_RXTSP,
    AGC_AVG_RXTSP,
    DC_REG_RXTSP,
    CMIX_GAIN_RXTSP,
    CMIX_SC_RXTSP,
    CMIX_BYP_RXTSP,
    AGC_BYP_RXTSP,
    GFIR3_BYP_RXTSP,
    GFIR2_BYP_RXTSP,
    GFIR1_BYP_RXTSP,
    DC_BYP_RXTSP,
    GC_BYP_RXTSP,
    PH_BYP_RXTSP,
    CAPD,
    DTHBIT_RX,
    SEL_RX,
    MODE_RX,
    PHO_RX,
    TRX_GAIN_SRC,

    LML2_TRXIQPULSE,
    LML2_SISODDR,
    LML1_TRXIQPULSE,
    LML1_SISODDR,
    MCLK2_DLY,
    MCLK1_DLY,
    MCLK2_INV,
    MCLK1_INV,

    CMIX_GAIN_TXTSP_R3,
    CMIX_GAIN_RXTSP_R3,
    R5_LPF_BYP_TBB,
    CG_IAMP_TBB_R3,
    LOSS_LIN_TXPAD_R3,
    LOSS_MAIN_TXPAD_R3,
    C_CTL_PGA_RBB_R3,
    G_PGA_RBB_R3,
    G_LNA_RFE_R3,
    G_TIA_RFE_R3,
    RZ_CTRL,
    CMPLO_CTRL_SX,
    CMPLO_CTRL_CGEN_R3,
    ISINK_SPIBUFF,

    DCMODE,
    PD_DCDAC_RXB,
    PD_DCDAC_RXA,
    PD_DCDAC_TXB,
    PD_DCDAC_TXA,
    PD_DCCMP_RXB,
    PD_DCCMP_RXA,
    PD_DCCMP_TXB,
    PD_DCCMP_TXA,

    DCCAL_CALSTATUS_RXBQ,
    DCCAL_CALSTATUS_RXBI,
    DCCAL_CALSTATUS_RXAQ,
    DCCAL_CALSTATUS_RXAI,
    DCCAL_CALSTATUS_TXBQ,
    DCCAL_CALSTATUS_TXBI,
    DCCAL_CALSTATUS_TXAQ,
    DCCAL_CALSTATUS_TXAI,

    DCCAL_CMPSTATUS_RXBQ,
    DCCAL_CMPSTATUS_RXBI,
    DCCAL_CMPSTATUS_RXAQ,
    DCCAL_CMPSTATUS_RXAI,
    DCCAL_CMPSTATUS_TXBQ,
    DCCAL_CMPSTATUS_TXBI,
    DCCAL_CMPSTATUS_TXAQ,
    DCCAL_CMPSTATUS_TXAI,

    DCCAL_CMPCFG_RXBQ,
    DCCAL_CMPCFG_RXBI,
    DCCAL_CMPCFG_RXAQ,
    DCCAL_CMPCFG_RXAI,
    DCCAL_CMPCFG_TXBQ,
    DCCAL_CMPCFG_TXBI,
    DCCAL_CMPCFG_TXAQ,
    DCCAL_CMPCFG_TXAI,

    DCCAL_START_RXBQ,
    DCCAL_START_RXBI,
    DCCAL_START_RXAQ,
    DCCAL_START_RXAI,
    DCCAL_START_TXBQ,
    DCCAL_START_TXBI,
    DCCAL_START_TXAQ,
    DCCAL_START_TXAI,

    DCWR_TXAI,
    DCRD_TXAI,
    DC_TXAI,
    DCWR_TXAQ,
    DCRD_TXAQ,
    DC_TXAQ,
    DCWR_TXBI,
    DCRD_TXBI,
    DC_TXBI,
    DCWR_TXBQ,
    DCRD_TXBQ,
    DC_TXBQ,
    DCWR_RXAI,
    DCRD_RXAI,
    DC_RXAI,
    DCWR_RXAQ,
    DCRD_RXAQ,
    DC_RXAQ,
    DCWR_RXBI,
    DCRD_RXBI,
    DC_RXBI,
    DCWR_RXBQ,
    DCRD_RXBQ,
    DC_RXBQ,
    DC_RXCDIV,
    DC_TXCDIV,
    HYSCMP_RXB,
    HYSCMP_RXA,
    HYSCMP_TXB,
    HYSCMP_TXA,
    DAC_CLKDIV,
    RSSI_RSSIMODE,
    RSSI_PD,
    INTADC_CMPSTATUS_TEMPREF,
    INTADC_CMPSTATUS_TEMPVPTAT,
    INTADC_CMPSTATUS_RSSI2,
    INTADC_CMPSTATUS_RSSI1,
    INTADC_CMPSTATUS_PDET2,
    INTADC_CMPSTATUS_PDET1,
    RSSI_BIAS,
    RSSI_HYSCMP,
    INTADC_CMPCFG_TEMPREF,
    INTADC_CMPCFG_TEMPVPTAT,
    INTADC_CMPCFG_RSSI2,
    INTADC_CMPCFG_RSSI1,
    INTADC_CMPCFG_PDET2,
    INTADC_CMPCFG_PDET1,
    RSSI_DAC_VAL,
    RSSI_PDET2_VAL,
    RSSI_PDET1_VAL,
    RSSI_RSSI2_VAL,
    RSSI_RSSI1_VAL,
    RSSI_TREF_VAL,
    RSSI_TVPTAT_VAL,
    RSSIDC_CMPSTATUS,
    RSSIDC_RSEL,
    RSSIDC_HYSCMP,
    RSSIDC_PD,
    RSSIDC_DCO2,
    RSSIDC_DCO1,
    DCLOOP_STOP,
    ENUM_COUNT,
};
} // namespace lime

namespace lime {
LIME_API const lime::LMS7002MCSR_Data::CSRegister& GetRegister(lime::LMS7002MCSR e);
}